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HM6216255H Series
4M high Speed SRAM (256-kword x 16-bit)
ADE-203-763D (Z) Rev. 1.0 Sep. 15, 1998 Description
The HM6216255H Series is a 4-Mbit high speed static RAM organized 256-k word x 16-bit. It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed circuit designing technology. It is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged in 400-mil 44-pin plastic SOJ and 400-mil 44-pin plastic TSOPII.
Features
* Single 5.0 Vsupply : 5.0 V 10 % * Access time: 10/12/15 ns (max) * Completely static memory No clock or timing strobe required * Equal access and cycle times * Directly TTL compatible All inputs and outputs * Operating current: 200/180/160 mA (max) * TTL standby current: 70/60/50 mA (max) * CMOS standby current: 5 mA (max) : 1.2 mA (max) (L-version) * Data retansion current: 0.8 mA (max) (L-version) * Data retantion voltage: 2 V (min) (L-version) * Center VCC and VSS type pinout
HM6216255H Series
Ordering Information
Type No. HM6216255HJP-10 HM6216255HJP-12 HM6216255HJP-15 HM6216255HLJP-10 HM6216255HLJP-12 HM6216255HLJP-15 HM6216255HTT-10 HM6216255HTT-12 HM6216255HTT-15 HM6216255HLTT-10 HM6216255HLTT-12 HM6216255HLTT-15 Access time 10 ns 12 ns 15 ns 10 ns 12 ns 15 ns 10 ns 12 ns 15 ns 10 ns 12 ns 15 ns 400-mil 44-pin plastic TSOPII (TTP-44DE) Package 400-mil 44-pin plastic SOJ (CP-44D)
Pin Arrangement
HM6216255HJP/HLJP Series
A0 A1 A2 A3 A4 CS I/O1 I/O2 I/O3 I/O4 VCC VSS I/O5 I/O6 I/O7 I/O8 WE A5 A6 A7 A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A17 A16 A15 OE UB LB I/O16 I/O15 I/O14 I/O13 VSS VCC I/O12 I/O11 I/O10 I/O9 NC A14 A13 A12 A11 A10
HM6216255HTT/HLTT Series
A0 A1 A2 A3 A4 CS I/O1 I/O2 I/O3 I/O4 VCC VSS I/O5 I/O6 I/O7 I/O8 WE A5 A6 A7 A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A17 A16 A15 OE UB LB I/O16 I/O15 I/O14 I/O13 VSS VCC I/O12 I/O11 I/O10 I/O9 NC A14 A13 A12 A11 A10
(Top View)
(Top View)
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HM6216255H Series
Pin Description
Pin name A0 to A17 I/O1 to I/O16 CS OE WE Function Address input Data input/output Chip select Output enable Write enable Pin name UB LB VCC VSS NC Function Upper byte select Lower byte select Power supply Ground No connection
Block Diagram
A1 A17 A7 A11 A16 A2 A6 A5 (MSB) (LSB)
Row decoder
Memory matrix 256 rows x 8 columns x 128 blocks x 16 bit (4,194,304 bits)
Internal voltage VCC generater VSS
CS I/O1 . . . I/O8 I/O9 . . . I/O16 WE CS LB UB Column I/O Input data control Column decoder CS
A10 A8 A9 A12 A13 A14 A0 A15 A3 A4
OE
CS
3
HM6216255H Series
Operation Table
CS H L L L L L L L L L Note: OE x H L L L L x x x x WE x H H H H H L L L L x: H or L LB x x L L H H L L H H UB x x L H L H L H L H Mode Standby Output disable Read VCC current I SB , I SB1 I CC I CC I/O1-I/O8 High-Z High-Z Output Output High-Z High-Z Input Input High-Z High-Z I/O9-I/O16 High-Z High-Z Output High-Z Output High-Z Input High-Z Input High-Z Ref. cycle -- -- Read cycle Read cycle Read cycle -- Write cycle Write cycle Write cycle --
Lower byte read I CC Upper byte read I CC -- Write I CC I CC
Lower byte write I CC Upper byte write I CC -- I CC
Absolute Maximum Ratings
Parameter Supply voltage relative to VSS Voltage on any pin relative to V SS Power dissipation Operating temperature Storage temperature Storage temperature under bias Notes: 1. 2. 3. 4. Symbol VCC VT PT Topr Tstg Tbias Value -0.5 to +7.0 -0.5* to V CC + 0.5* 1.0* /1.3* 0 to +70 -55 to +125 -10 to +85
3 4 1 2
Unit V V W C C C
VT (min) = -2.0 V for pulse width (under shoot) 8 ns VT (max) = VCC + 2.0 V for pulse width (over shoot) 8 ns At still air condition At air flow 1.0 m/s
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HM6216255H Series
Recommended DC Operating Conditions (Ta = 0 to +70C)
Parameter Supply voltage Symbol VCC* VSS * Input voltage VIH VIL Notes: 1. 2. 3. 4.
2 3
Min 4.5 0 2.2 -0.5*
1
Typ 5.0 0 -- --
Max 5.5 0 VCC + 0.5* 0.8
2
Unit V V V V
VIL (min) = -2.0 V for pulse width (under shoot) 8 ns VIH (max) = VCC + 2.0 V for pulse width (over shoot) 8 ns The supply voltage with all VCC pins must be on the same level. The supply voltage with all VSS pins must be on the same level.
DC Characteristics (Ta = 0 to +70C, VCC = 5.0 V 10 %, VSS = 0 V)
Parameter Input leakage current Output leakage current* 1 Operating power supply current Symbol Min |ILI| |ILO | 10 ns cycle I CC 12 ns cycle I CC 15 ns cycle I CC Standby power supply current 10 ns cycle I SB 12 ns cycle I SB 15 ns cycle I SB I SB1 -- -- -- -- -- -- -- -- -- Typ*1 -- -- -- -- -- -- -- -- 0.1 Max 2 2 200 180 160 70 60 50 5 mA VCC CS VCC - 0.2 V, (1) 0 V Vin 0.2 V or (2) VCC Vin VCC - 0.2 V mA CS = VIH, Other inputs = VIH/VIL Unit Test conditions A A mA Vin = VSS to V CC Vin = VSS to V CC CS = VIL, Iout = 0 mA Other inputs = VIH/VIL
--* 2 Output voltage VOL VOH Note: -- 2.4
0.1*2 -- --
1.2 * 2 0.4 -- V V I OL = 8 mA I OH = -4 mA
1. Typical values are at VCC = 5.0 V, Ta = +25C and not guaranteed. 2. This characteristics is guaranteed only for L-version.
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HM6216255H Series
Capacitance (Ta = +25C, f = 1.0 MHz)
Parameter Input capacitance*
1 1
Symbol Cin CI/O
Min -- --
Typ -- --
Max 6 8
Unit pF pF
Test conditions Vin = 0 V VI/O = 0 V
Input/output capacitance* Note:
1. This parameter is sampled and not 100% tested.
6
HM6216255H Series
AC Characteristics (Ta = 0 to +70C, VCC = 5.0 V 10 %, unless otherwise noted.)
Test Conditions * * * * Input pulse levels: 3.0 V/0.0 V Input rise and fall time: 3 ns Input and output timing reference levels: 1.5 V Output load: See figures (Including scope and jig)
5V
Dout Zo=50 RL=50 1.5 V Output load (A)
480 Dout 255 5 pF
Output load (B) (for tCLZ, tOLZ, tLBLZ, tUBLZ, tCHZ, tOHZ, tLBHZ, tUBHZ, tWHZ, and tOW)
Read Cycle
HM6216255H -10 Parameter Read cycle time Address access time Chip select access time Output enable to output valid Byte select to output valid Output hold from address change Chip select to output in low-Z Output enable to output in low-Z Byte select to output in low-Z Chip deselect to output in high-Z Output disable to output in high-Z Byte deselect to output in high-Z Symbol t RC t AA t ACS t OE t LB, t UB t OH t CLZ t OLZ t LBLZ, t UBLZ t CHZ t OHZ t LBHZ, t UBHZ Min 10 -- -- -- -- 3 3 0 0 -- -- -- Max -- 10 10 5 5 -- -- -- -- 5 5 5 -12 Min 12 -- -- -- -- 3 3 0 0 -- -- -- Max -- 12 12 6 6 -- -- -- -- 6 6 6 -15 Min 15 -- -- -- -- 3 3 0 0 -- -- -- Max -- 15 15 7 7 -- -- -- -- 7 7 7 Unit ns ns ns ns ns ns ns ns ns ns ns ns 1 1 1 1 1 1 Notes
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HM6216255H Series
Write Cycle
HM6216255H -10 Parameter Write cycle time Address valid to end of write Chip select to end of write Write pulse width Byte select to end of write Address setup time Write recovery time Data to write time overlap Data hold from write time Write disable to output in low-Z Output disable to output in high-Z Write enable to output in high-Z Symbol t WC t AW t CW t WP t LBW, t UBW t AS t WR t DW t DH t OW t OHZ t WHZ Min 10 7 7 7 7 0 0 5 0 3 -- -- Max -- -- -- -- -- -- -- -- -- -- 5 5 -12 Min 12 8 8 8 8 0 0 6 0 3 -- -- Max -- -- -- -- -- -- -- -- -- -- 6 6 -15 Min 15 10 10 10 10 0 0 7 0 3 -- -- Max -- -- -- -- -- -- -- -- -- -- 7 7 Unit ns ns ns ns ns ns ns ns ns ns ns ns 1 1 1 8 7 9, 10 5 6 Notes
Notes: 1. Transition is measured 200 mV from steady voltage with Load (B). This parameter is sampled and not 100% tested. 2. If the CS or LB or UB low transition occurs simultaneously with the WE low transition or after the WE transition, output remains a high impedance state. 3. WE and/or CS must be high during address transition time. 4. If CS, OE, LB and UB are low during this period, I/O pins are in the output state. Then the data input signals of opposite phase to the outputs must not be applied to them. 5. t AS is measured from the latest address transition to the latest of CS, WE, LB or UB going low. 6. t WR is measured from the earliest of CS, WE, LB or UB going high to the first address transition. 7. A write occurs during the overlap of low CS, low WE and low LB or low UB. 8. t CW is measured from the later of CS going low to the end of write. 9. t LBW is measured from the later of LB going low to the end of write. 10. t UBW is measured from the later of UB going low to the end of write.
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HM6216255H Series
Timing Waveforms
Read Timing Waveform (1) (WE = VIH)
t RC Address tAA tACS CS tOE OE tLB LB tLBHZ 1 * tOHZ *1 tCHZ *1 Valid address
tUB UB tLBLZ *1 Dout (Lower byte) High Impedance *4 tUBLZ *1 tOLZ *1 tCLZ *1 High Impedance *4 Valid data
tUBHZ1 * *4 tOH
Dout (Upper byte)
Valid data
*4
9
HM6216255H Series
Read Timing Waveform (2) (WE = VIH, LB = VIL , UB, = VIL)
tRC
Address
Valid address tAA tACS tOH tCHZ*1
CS tOE OE tOLZ*1 tCLZ *1 Dout (Lower/Upper byte) High Impedance *4 Valid data *4 tOHZ*1
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HM6216255H Series
Write Timing Waveform (1) (LB, UB Controlled)
tWC Address tAW tAS tWP WE*3 tCW CS*3 Valid address tWR
OE tLBW LB tUBW UB tWHZ tOHZ High impedance tOLZ tOW
Dout (Lower byte)
Dout (Upper byte)
High impedance tDW tDH Valid data tDW tDH Valid data
Din (Lower byte)
Din (Upper byte)
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HM6216255H Series
Write Timing Waveform (2) (WE Controlled)
tWC Address tAW tAS WE*3 tCW CS*3 tWP Valid address tWR
OE tLBW LB, UB tWHZ tOHZ Dout (Lower/Upper byte) High impedance *2 tOLZ tOW tUBW
tDW
tDH Valid data
Din (Lower/Upper byte)
12
HM6216255H Series
Write Timing Waveform (3) (CS Controlled)
tWC Address Valid address tAW tAS tWP tWR
WE *3 tCW CS *3
OE tLBW LB, UB tWHZ tOHZ Dout (Lower/Upper byte) High impedance * *2
4
tUBW
tOLZ tOW
tDW
tDH Valid data
Din (Lower/Upper byte)
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HM6216255H Series
Low VCC Data Retention Characteristics (Ta = 0 to +70C)
This characteristics is guaranteed only for L-version.
Parameter VCC for data retention Symbol VDR Min 2.0 Typ*1 Max -- -- Unit V Test conditions VCC CS VCC - 0.2 V, (1) 0 V Vin 0.2 V or (2) VCC Vin VCC - 0.2 V VCC = 3 V VCC CS VCC - 0.2 V, (1) 0 V Vin 0.2 V or (2) VCC Vin VCC - 0.2 V See retention waveform
Data retention current
I CCDR
--
50
800
A
Chip deselect to data retention time Operation recovery time Note:
t CDR tR
0 5
-- --
-- --
ns ms
1. Typical values are at VCC = 3.0 V, Ta = +25C, and not guaranteed.
Low V CC Data Retention Timing Waveform
tCDR VCC 3.0 V VDR 2.2 V CS 0V VCC CS VCC - 0.2 V Data retention mode tR
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HM6216255H Series
Package Dimensions
HM6216255HJP/HLJP Series (CP-44D)
Unit: mm 28.33 28.90 Max 44 23 10.16 0.13 0.74 1.30 Max 3.50 0.26 1 22 11.18 0.13
0.80 +0.25 -0.17
0.43 0.10 0.41 0.08
1.27
9.40 0.25
Hitachi Code JEDEC EIAJ Weight (reference value) CP-44D Conforms -- 1.8 g
0.10
Dimension including the plating thickness Base material dimension
2.65 0.12
15
HM6216255H Series
HM6216255HTT/HLTT Series (TTP-44DE)
Unit: mm 18.41 18.81 Max 44 23
1 0.27 0.07 0.25 0.05
0.80 0.13 M
22 0.80
10.16
1.005 Max 0.145 0.05 0.125 0.04
11.76 0.20 0.50 0.10 0.68 0 - 5 0.13 0.05
1.20 Max
0.10
Dimension including the plating thickness Base material dimension
Hitachi Code JEDEC EIAJ Weight (reference value)
TTP-44DE -- -- 0.43 g
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HM6216255H Series
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & IC Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to:
Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX
Hitachi Semiconductor (America) Inc. 2000 Sierra Point Parkway Brisbane, CA 94005-1897 Tel: <1> (800) 285-1601 Fax: <1> (303) 297-0447
Copyright (c) Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
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